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EP2SGX30DF780C5N IC产品资料

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EP2SGX30DF780C5N IC产品资料
资料编号:
483675
资料标题:
EP2SGX30DF780C5N
品 牌:
ALTERA
点击次数:
163
文件大小:
3924
资料属性:
....

EP2SGX30DF780C5N 资料标题简介

Section I. Stratix II GX Device

EP2SGX30DF780C5N 资料关键信息

Features This section lists the Stratix II GX device features.
■ Main device features:
● TriMatrix memory consisting of three RAM block sizes to
implement true dual-port memory and first-in first-out (FIFO)
buffers with performance up to 550 MHz
● Up to 16 global clock networks with up to 32 regional clock
networks per device region
● High-speed DSP blocks provide dedicated implementation of
multipliers (at up to 450 MHz), multiply-accumulate functions,
and finite impulse response (FIR) filters
● Up to four enhanced PLLs per device provide spread spectrum,
programmable bandwidth, clock switch-over, real-time PLL
reconfiguration, and advanced multiplication and phase
shifting
● Support for numerous single-ended and differential I/O
standards
● High-speed source-synchronous differential I/O support on up
to 71 channels
● Support for source-synchronous bus standards, including SPI-4
Phase 2 (POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI,
and CSIX-L1
● Support for high-speed external memory, including quad data
rate (QDR and QDRII) SRAM, double data rate (DDR and
DDR2) SDRAM, and single data rate (SDR) SDRAM

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