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M391T2863QZH-CE7 IC产品资料

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M391T2863QZH-CE7 IC产品资料
资料编号:
539475
资料标题:
M391T2863QZH-CE7
品 牌:
SAMSUNG
点击次数:
206
文件大小:
511
资料属性:
....

M391T2863QZH-CE7 资料标题简介

DDR2 Unbuffered DIMM Ordering Information

M391T2863QZH-CE7 资料关键信息

FEATURES
·Performance range
·JEDEC standard VDD = 1.8V±0.1V Power Supply
·VDDQ = 1.8V ?0.1V
·333MHz fCK for 667Mb/sec/pin, 400MHz fCK for 800Mb/sec/pin
·8 Banks
·Posted CAS
·Programmable CAS Latency: 3, 4, 5, 6
·Programmable Additive Latency: 0, 1 , 2 , 3, 4, 5
·Write Latency(WL) = Read Latency(RL) -1
·Burst Length: 4 , 8(Interleave/Nibble sequential)
·Programmable Sequential / Interleave Burst Mode
·Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
·Off-Chip Driver(OCD) Impedance Adjustment
·On Die Termination with selectable values(50/75/150 ohms or disable)
·Average Refresh Period 7.8us at lower than a TCASE 85癈, 3.9us at 85癈 < TCASE < 95 癈
- Support High Temperature Self-Refresh rate enable feature
·Package: 60ball FBGA - 128Mx8 and 84ball FBGA - 64Mx16
·All of base components are Lead-Free, Halogen-Free, and RoHS compliant
E7 (DDR2-800) F7 (DDR2-800) E6 (DDR2-667) Unit
Speed@CL3 400 - 400 Mbps
Speed@CL4 533 533 533 Mbps
Speed@CL5 800 667 667 Mbps
Speed@CL6 - 800 - Mbps
CL-tRCD-tRP 5-5-5 6-6-6 5-5-5 CK
3.0 Address Configuration
Organization Row Address Column Address Bank Address Auto Precharge
128Mx8(1Gb) based Module A0-A13 A0-A9 BA0-BA2 A10
64Mx16(1Gb) based Module A0-A12 A0-A9 BA0-BA2 A10

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